Certain embodiments of the present invention afford an efficient approach for using a compact DRAM cell to reduce the leakage current when storing a data bit in the DRAM cell. In particular, certain embodiments provide a compact DRAM cell having a storage node formed by electrically connecting the drain nodes of two transistors in the DRAM cell.
Dynamic RAM is a type of memory that keeps its contents only if supplied with regular clock pulses and a chance to periodically refresh the stored data internally. DRAM is much less expensive than static RAM (which needs no refreshing) and is the type found in most personal computers and other digital applications.
DRAM storage cells may be formed from two elements, usually a transistor and a capacitor. A major reduction in storage cell area is achieved with such a configuration. As a result, DRAM is an attractive option for custom and semi-custom chips.
Highly integrated System-on-Chip (SOC) implementations require high density and efficient embedded memory. Embedded DRAM memory has the potential to offer high density, low power, and high speed required for state-of-the-art chip designs. Costs associated with integrating embedded DRAM remain a significant factor that slows the integration and adoption of DRAM memory for a wide range of applications including next-generation handsets and high-speed networking.
A DRAM cell configuration having high storage capacity and low leakage current that uses generic fabrication processes, requiring no additional masks, is desired. Reducing leakage current maximizes retention time which means reducing the number of times per second a data bit needs to be refreshed in a storage node so the data bit is not lost. The more often the data bits must be refreshed, the higher the required power and the less the dependability of the data bits.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with embodiments of the present invention as set forth in the remainder of the present application with reference to the drawings.